The level 1:
.
|-- design
|-- ip_lib
|-- verif
`-- vip_lib
.
|-- design
| `-- smexpp
| |-- irq_handler
| | |-- doc
| | |-- rtl
| | |-- simu
| | |-- systemc
| | `-- tb
| |-- rd_xcache
| | |-- doc
| | |-- rtl
| | |-- systemc
| | `-- tb
| `-- wr_xcache
| |-- doc
| |-- rtl
| |-- simu
| |-- systemc
| `-- tb
|-- ip_lib
| |-- fifo_sp
| | `-- rtl
| |-- fifo_synch
| | `-- rtl
| `-- mem_dp
| `-- rtl
|-- verif
| `-- smexpp
| |-- irq_handler
| | |-- doc
| | |-- hdl
| | |-- log
| | |-- simu
| | | |-- DVEfiles
| | | |-- WORK
| | | |-- csrc
| | | |-- simv.cm
| | | | `-- db
| | | | |-- verilog
| | | | `-- vhdl
| | | |-- simv.daidir
| | | `-- simv.vdb
| | | `-- snps
| | | `-- coverage
| | | `-- db
| | | `-- testdata
| | | |-- test
| | | | `-- testbench
| | | |-- test_gen_1
| | | | `-- testbench
| | | `-- test_gen_2
| | | `-- testbench
| | |-- sv
| | | |-- ic_bfm
| | | `-- irq_gen
| | `-- tests
| |-- rd_xcache
| | |-- doc
| | |-- hdl
| | |-- log
| | |-- patterns
| | |-- simu
| | | |-- WORK
| | | |-- csrc
| | | |-- simv.daidir
| | | `-- simv.vdb
| | | |-- db
| | | | |-- verilog
| | | | `-- vhdl
| | | `-- snps
| | | |-- debug
| | | | `-- linux7
| | | | `-- lib
| | | `-- ovasim
| | | |-- csrcovarpp
| | | `-- ovadaidir
| | |-- sv
| | `-- tests
| `-- wr_xcache
| |-- hdl
| |-- log
| |-- patterns
| |-- simu
| | |-- DEFAULT.DB
| | |-- WORK
| | |-- csrc
| | |-- simv.daidir
| | `-- simv.vdb
| | |-- db
| | | |-- verilog
| | | `-- vhdl
| | `-- snps
| | |-- debug
| | | `-- linux7
| | | `-- lib
| | `-- ovasim
| | |-- csrcovarpp
| | `-- ovadaidir
| |-- sv
| `-- tests
`-- vip_lib
|-- bfm_data_itf
| |-- doc
| |-- examples
| |-- simu
| `-- sv
|-- bfm_fio_itf
| |-- doc
| |-- examples
| |-- simu
| `-- sv
|-- bfm_sysmem_itf
| `-- sv
`-- vip_regs
|-- doc
|-- examples
|-- simu
`-- sv
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